1. Field of the Invention
The present invention generally relates to systems and methods for defect detection using structural information.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers to promote higher yield in the manufacturing process and thus higher profits. Inspection has always been an important part of fabricating semiconductor devices such as ICs. However, as the dimensions of semiconductor devices decrease, inspection becomes even more important to the successful manufacture of acceptable semiconductor devices because smaller defects can cause the devices to fail.
Some current inspection methods for array areas on specimens include performing defect detection in a rectangular care area covering an entire array region. Gray level values in images generated for the array areas are used to divide the images into different areas (called segmentation). These areas are meant to correspond to different structures of the specimen. The gray level segmentation may then be used to guide sensitivity settings for defect detection.
However, correspondence between gray level values and wafer structures may not be unique. For example, n-type metal-oxide-semiconductor (NMOS) and p-type MOS (PMOS) structures may have similar gray level values. Due to process variation, the gray level values on the same structure can vary across specimens or between specimens. Consequently, the result may not be a clear indication about wafer structures.
Accordingly, it would be advantageous to develop systems and methods for detecting defects on a specimen that do not have one or more of the disadvantages described above.